DVB-S2-X Compliant Decoder Core  
The AHA4709D LDPC/BCH forward error correction (FEC) decoder core is fully compliant with section 5.3 of the Digital Video Broadcast S2-Extention (DVB-S2-X) standard. The core supports all codes, frame sizes, and interleave schemes set forth in the DVB-S2-X specifications for broadcast, interactive, digital satellite news gathering, professional services, and very-low signal-to-noise ratio (VL-SNR) applications. The core allows code and modulation changes on a block-by-block basis to fully support both Adaptive Coding and Modulation (ACM) and Variable Coding and Modulation (VCM).
  •  DVB-S2-X compliant
  • ACM & VCM compliant
  • Supports all original DVB-S2 MODCODs plus all additional DVB-S2-X MODCODs
  • Supports VL-SNR codes
  • 16K, 32K, and 64K block sizes
  • 1 to 8 bits / symbol
  • Max Input Channel rate:  2 bits / clock
  • Max Output Data rate:  1 bit / clock
  • Typical Speed in Stratix V:  275 MHz
  • Typical Resource Usage in Stratix V:  24K ALMs, 254 M20K RAM


  • Complete Documentation
  • Synthesized Netlist
  • Netlist or Encrypted Source for Simulation
  • Bit accurate C / Matlab models
  • Spreadsheet for calculating iterations vs. throughput
Product Briefs

Product Specifications
AHA4709D Specification - DVB-S2-X Compliant LDPC/BCH FEC Decoder Core


Data Compression

Forward Error Correction

Encryption and Hashing

Regular Expression Search

Recent News
Permabit and AHA Partnership Improves Data Center CAPEX and OPEX
Posted on Wednesday, October 26, 2016
Contact Us