15 Mbps LDPC Low Density Parity Check Code Encoder/Decoder Core
AHA has developed a configurable and compact Low Density Parity Check Code (LDPC) core for use in a variety of Forward Error Correction (FEC) applications. The core supports numerous codes, blocksizes, modulation schemes and data rates, which can be changed "on-the-fly" to accommodate changing channel conditions and Adaptive Coding Modulation/Variable Coding Modulation (ACM/VCM) systems. AHA's IP core provides an economical solution by obtaining greater coding gain and placing communications links closer to the Shannon Limit for Bit-Error-Rate (BER) performance.
  • Available for FPGAs or ASIC
  • Supports code change “on-the-fly”, allowing adaptation to changing channel conditions
  • Compatible with CCM, ACM and VCM systems
  • Configurable design allows trade-offs between error rate performance and data rate
  • Supports up to 8K bit coded block size
  • Each code has an independent programmable iteration count
  • ASIC or FPGA netlist
  • Complete documentation 
Product Briefs


Data Compression

Forward Error Correction

Encryption and Hashing

Regular Expression Search

Recent News
Permabit and AHA Partnership Improves Data Center CAPEX and OPEX
Posted on Wednesday, October 26, 2016
Contact Us